Altera’s Nios II is a 32 bit RISC architecture processor (soft) core that can be embedded into MAX 10 FPGAs.
I am now writing a short C program to check the SDRAM chip on the FPGA board.
Ham Radio Blog
Ham Radio Blog
Altera’s Nios II is a 32 bit RISC architecture processor (soft) core that can be embedded into MAX 10 FPGAs.
I am now writing a short C program to check the SDRAM chip on the FPGA board.